POWER*

performance optimization with enhanced RISC architecture
IBMのRISCアーキテクチャ.
performance optimization with enhanced RISC architecture;
[C].

![]() | 丸善 「略語大辞典」 JLogosID : 11856298 |
100辞書・辞典一括検索
IBMのRISCアーキテクチャ.
performance optimization with enhanced RISC architecture;
[C].
![]() | 丸善 「略語大辞典」 JLogosID : 11856298 |